The Call for Papers is Closed
For more information, please contact firstname.lastname@example.org
For the complete author submission timeline, please view the Author's Kit.
For more than 20 years, SNUG has provided a unique forum for design professionals to learn about the latest in EDA technology, and how it is being used by many of the top companies to solve difficult design challenges and to improve design productivity, predictability, and profitability.
If you have used Synopsys technology to overcome difficult design issues and to accelerate your innovation, the SNUG community wants to hear from you! The SNUG 2013 program will provide insights into topics including but not limited to:
- High Performance Design (Low-Power Design, Top-Level Integration and Optimization, High Performance Methodologies for applications such as Graphics/GPUs and Processors)
- Applying Advanced Technologies (Advanced node, 3DIC, FinFET)
- Accelerating SoC Verification (Full Chip Validation, Digital Block Verification, Analog-Mixed-Signal Verification, Low-Power Verification)
- Prototyping (Virtual Prototyping, HAPS, Hybrid Prototyping)
- Designing and Verifying FPGAs
- Selecting and Integrating IP
- Managing and Optimizing the Compute Infrastructure for EDA Applications (High Performance Computing, queue & job management, storage/CPU/license resource management, impact of emerging technologies on EDA)
If you have questions, please contact your local Synopsys AC or email@example.com