SNUG San Jose 

Celebrating 20 Years of Designer Productivity 

Santa Clara Convention Center 
Santa Clara, CA
March 29-31, 2010

Join more than 2,000 of your fellow Synopsys technology users for Silicon Valley’s largest technical conference. This year’s 20th Anniversary SNUG will feature an outstanding program that is focused on delivering practical information you can immediately apply to your current project or use to jumpstart your next design.

 

 

 


 


Design Compiler Luncheon
Learn how to cut both synthesis and physical implementation time with the latest release of Design Compiler.


Synopsys R&D Night
Join us as we celebrate SNUG’s 20th Anniversary!


PrimeTime Lunch
Join Kenneth Rousseau VP of R&D at the PrimeTime SIG lunch event to hear about “Harnessing Multicore Hardware to Accelerate PrimeTime Static Timing Analysis.”


Designer Community Expo
Over 50 companies from across the electronics industry showcase their joint solutions with Synopsys


Social Media at SNUG
#SNUGSJ10. Easy to remember. Easy to find. The conversation starts at SNUG.



1st Place - Best Paper SystemVerilog Assertions - Design Tricks and SVA Bind Files
Clifford Cummings [Sunburst Design, Inc.]
PaperPresentation


2nd Place - Best Paper Advanced VMM Transactor Development: Tips for Designing VIP You Wouldn't Mind Reusing
Kelly Larson [MediaTek Wireless, Inc.]
PaperPresentation


3rd Place - Best Paper If Chained Implications in Properties Weren't So Hard, They'd Be Easy
Don Mills [Microchip Technology]
PaperPresentation


Best First-Time Presenter SBPF Performance and Accuracy Evaluation
Dan Prevedel [LSI Corp.]
PaperPresentation


Technical Committee Award Honorable Mention Using the New Features in VMM 1.1 for Multi-Stream Scenarios
Jason Sprott, Sumit Dhamanwala, JL Gray [Verilab], Clifford Cummings [Sunburst Design Inc.]
PaperPresentation


Technical Committee Award Honorable Mention Using Bind for Class-Based Testbench Reuse with Mixed-Language Designs
Doug Smith [Doulos]
PaperPresentation


Technical Committee Award Design for Power Gating - And What UPF Can, and Cannot, Do for You
David Flynn [ARM, Inc.]
PaperPresentation


ProceedingsDownload 2009 proceedings
PAPERS (30 MB) PRESENTATIONS (36 MB) TUTORIALS (62 MB)

External Link Icon Santa Clara Convention Center
5001 Great America Parkway
Santa Clara, CA

Hotel Accommodations
To facilitate your lodging requirements, Synopsys has arranged for a block of rooms at the
Hyatt Regency Santa Clara - Convention Center. The hotel is conveniently located in the
heart of Silicon Valley and is minutes away from the San Jose Airport.

The hotel is expected to sell out during SNUG so reserve your room early.

To obtain the group rate, please call the hotel directly at (888) 421-1442.

Hotel Name: Hyatt Regency Santa Clara
Hotel Address:
 
5101 Great America Parkway,
Santa Clara, CA 95054
Reservation Online:
 
Hyatt - SNUG reservation page
Rates available only from link above.
Reservation Phone #:
 
888 421 1442 or 408 200 1234
Ask for 'reservations'
Meeting Code: SYNO
Room Rates:
(single/double)
(triple)
(quad)

$169.00
$219.00
$244.00
Discount Rates good until: February 28, 2010

SNUG thanks the members of the Technical Committee who volunteer their time and expertise to ensure SNUG’s technical quality, local perspective and value to the users of Synopsys tools and technology.

User Technical Chairperson
John Busco, NVIDIA Corp.

Members
Ajay Bavle Microchip Technology
Al Czamara, LOA Technology
Amre Sultan, XtremeEDA Corp.
Andy Copper, ARCH Design Solutions, Inc.
Anwar Hasan, STMicroelectronics
Brian Kane, Northrop Grumman Corp.
Chris Kiegle, IBM
Cliff Cummings, Sunburst Design, Inc.
Darell Whitaker, IBM
Dinesh Tyagi, Innovative Logic
Don Mills, Microchip Technology
Eric Delage, Zodiac Data Systems
Frank Szorc, Linear Technology
Gregg Lahti, Microchip Technology, Inc.
Jason Pecor, Silicon Logic Engineering
John Dickol, MediaTek Wireless, Inc.
Jonah Probell, Consultant
Karthik Rajan, Microchip Technology, Inc.
Kelsey Muma, XtremeEDA Corp.
Leah Clark, Broadcom Corp.
Mark Sprague, AMD

Matt Weber, Silicon Logic Engineering
Mike Bartley, Test Verification and Solutions
Neel Das, SMSC
Paul Lungu, Nortel
Paul Zimmer, Zimmer Design Services
Rainer Mann, Global Foundries
Rick Furtner, Consultant
Ron Goodstein, First Shot Logic Simulation and Design
Ronald Kalim, Consultant
Sachin Parikh, Broadcom Corp.
Satinderjit Singh, ARM, Ltd.
Serag GadelRab, Qualcomm
Surya Hotha, Posedge, Inc.
Tony Todesco, AMD