SNUG search results 


Advanced Synopsys UPF-Based Flow to Perform Implementation & Verification - Silicon Valley, 2016
TutorialVideo

Applying UPF 3.0 for Early, System-Level Power Analysis of SoCs with Micron DDR Memories - Silicon Valley, 2016
Tutorial

Evolution of Socionext’s UPF Multi-Voltage Design Flow - Silicon Valley, 2016
Mahiro Hikita - Socionext
Presentation

Complete Low Power Verification Using Formality - Austin, 2015
TutorialVideo

Incorporating UPF Specifications and Equivalence Checking into your FPGA Prototype - Boston, 2015
TutorialVideo

MTCMOS Based Low Power Implementation in GLOBALFOUNDRIES 28nm Process Using UPF2.0 - A Case Study - Boston, 2015
Ramin Navai - Synopsys; Farid Labib - GLOBALFOUNDRIES
PaperPresentationSession Recording

UPF-Based Synthesis Flow for Complex Mixed Signal IP Blocks - Boston, 2015
PaperPresentation

Mixed-Signal Verification of UPF Based Designs - A Practical Example - France, 2015
Tutorial

Mixed-signal Verification of UPF-based Designs - A Practical Example - Germany, 2015
Tutorial

MTCMOS Based Low Power Implementation in GLOBALFOUNDRIES 28nm Process Using UPF2.0 - A Case Study - Germany, 2015
Farid Labib - GLOBALFOUNDRIES; Ramin Navai - Synopsys
PaperPresentation

AMS Verification of High Speed Interfaces - India, 2015
Gautham S Harinarayan, Garima Jain, Nitin Pant, Manmohan Rana - Freescale Semiconductors
Publish Only

ASIC to FPGA-based Prototype Conversion - India, 2015
Tutorial

Is X-optimism Burning my Low Power Design? - India, 2015
Harsh Garg - Freescale Semiconductor; Mayank Bindal - Synopsys
PaperPresentation

Static Low Power Signoff on Multimillion Gate Design Using VC-LP - India, 2015
Sayandeep Nag, Bhawna Pancholi, Ravindranatha SG - Qualcomm
PaperPresentation

ASIC to FPGA-based Prototype Conversion - Silicon Valley, 2015
Tutorial

Challenges and Benefits of Deploying a Master UPF Flow - Silicon Valley, 2015
Chetan Avlani, Anand Lakshmanan, Ling Zhang - Broadcom; Amir Nilipour, Krishna Theja Avvaru, Vishwajith Singh - Synopsys
PaperPresentation

Power Intent (UPF) Based Synthesis Flow for Multimillion Gate Complex SoCs - Silicon Valley, 2015
Salima Lakhani, Purnima Ramakrishnan, Debajani Majhi - Broadcom
PaperPresentation

UPF-Based Static Low-Power Verification in Complex Power Structure SoC Design Using VCLP - Silicon Valley, 2015
Debajani Majhi, Liu Shaotao - Broadcom
PaperPresentation

VC Apps Developer Forum - Enhancing Debug Productivity - Silicon Valley, 2015
Tutorial

Tutorial: Low Power Verification Solution - Singapore, 2015
Tutorial

TA1.1 UPF Partitioning Challenges in DVFS Era - Taiwan, 2015
Jian-Wei Lin, Hsiung-Kai Chen, Lan-Sin Liau - MediaTek
PaperPresentation

TB3.1 UPF Modeling of Retention Register - Taiwan, 2015
Shang-Wei Tu - MediaTek; Amol Herlekar , Tiger Hsu - Synopsys
PaperPresentation