SNUG search results 


Accelerate Your Prototyping Productivity Leveraging HAPS Integrated Prototyping Solution - Austin, 2016
TutorialVideo

Achieving Correlation Between Synthesis and Routed Design for High-Performance Block - Austin, 2016
Umesh Chejara - Advanced Micro Devices
Presentation

Advanced Verification Techniques for the NXP LS1088A Memory Validation - Austin, 2016
Aditya Musunuri, Amol Bhinge - NXP Semiconductors; Nasib Naser - Synopsys
PaperPresentationSession Recording

Advanced X-Prop Usage for the NXP LS1088A Verification - Austin, 2016
Jie Wen, Amol Bhinge, Vaibhav Kumar - NXP Semiconductors; Jiri Prevratil - Synopsys
PaperPresentationSession Recording

Applying Stimulus and Sampling Outputs - UVM Verification Testing Techniques - Austin, 2016
Clifford E. Cummings - Sunburst Design
PaperPresentationSession Recording

Best Practices for a Performance- and Area-Focused Implementation of High-Performance GPUs Using Galaxy Design Platform - Austin, 2016
TutorialVideo

Best Practices for High-Performance, Energy-Efficient Implementations of the ARM Cortex-A73 Processor in 16-nm FinFET Plus (16FF+) Process Technology Using Synopsys Galaxy Design Platform - Austin, 2016
Nandan Nayampally - ARM; Michael Montana - Synopsys
Presentation

Black-Boxing Techniques for Improving VC-LP Throughput - Austin, 2016
Parag Mandrekar, Joseph Gutierrez, Hank Lin - Advanced Micro Devices; Vishwanath Sundararaman - Synopsys
PaperPresentation

Complex Constraints: Unleashing the Power of the VCS SystemVerilog Constraint Solver - Austin, 2016
John Dickol - Samsung
PaperPresentationSession Recording

Configuring a Date with a Model - A Guide to Configuration Objects and Register Models - Austin, 2016
Jeff Montesano, Jeff Vance - Verilab
PaperPresentationSession Recording

Connectivity Validation with SpyGlass - Austin, 2016
TutorialVideo

Custom Compiler Technology Walkthrough - Austin, 2016
TutorialVideo

Design Compiler Update and Runtime Best Practices - Austin, 2016
TutorialVideo

Detoxify Your Schedule With A Low-Fat UVM Environment - Austin, 2016
Nihar Shah - Oracle Labs
Publish Only

DFTMAX Ultra User Experience for Small, Digital, Mixed-Signal Devices - Austin, 2016
Christopher Ryan, Kien Vi - Maxim Integrated
PaperPresentationSession Recording

DFTMAX Ultra: Achieve Additional Cost Reduction with Hardware-Assisted Shift Power Reduction - Austin, 2016
TutorialVideo

Early Design decisions based on RTL Power Estimation - Austin, 2016
Sandilya Bhamidipati - NXP, Rose Wang - NXP
Publish Only

ECO User Case Studies Using Formality Ultra - Austin, 2016
TutorialVideo

Effective Reporting and Analysis of Timing Results with PrimeTime - Austin, 2016
TutorialVideo

Effective SystemVerilog Functional Coverage: Design and Coding Recommendations - Austin, 2016
Vanessa Cooper, Jonathan Bromley, Mark Litterick - Verilab
Publish Only

Essential Ingredients of Formal Based Verification - Austin, 2016
TutorialVideo

Executable Verification Plan (XVP) - Austin, 2016
Gaurav Brahmbhatt, Gaurang Chitroda, Manish Patel, Pinal Patel - eInfochips; Joe McCann - Synopsys
Publish Only

Floorplanning Large Blocks Using IC Compiler II - Austin, 2016
TutorialVideo

High-Level Performance Estimation on Virtual Prototypes Employing Timing Annotation - Austin, 2016
Barry Spotts, Robert Kaye - ARM
PaperPresentation