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Best Papers
1st Place - Best Paper
:
SystemVerilog Implicit Port Enhancements Accelerate System Design & Verification
Author(s):
Clifford Cummings [Sunburst Design, Inc.]
Paper
Presentation
2nd Place - Best Paper
:
Creating Stimulus and Stimulating Creativity: Using the VMM Scenario Generator
Author(s):
Jonathan Bromley [Doulos Ltd.]
Paper
Presentation
3rd Place - Best Paper, Technical Committee Award Honorable Mention
:
The Ten Edits I Make Against Most IP
Author(s):
Wilson Snyder [SiCortex, Inc.]
Paper
Presentation
Best First-Time Presenter
:
From Validation to Generation: Making Hercules do the Heavy Lifting
Author(s):
Dale Donchin [Analog Devices, Inc.]
Paper
Presentation
Technical Committee Award
:
When Floorplans Attack: How To Balance Routing, Timing and Area on Problematic Designs
Author(s):
John Vargas [Unisys], Peter Jarvis [Synopsys, Inc.]
Paper
Presentation
Technical Committee Award Honorable Mention
:
A SystemVerilog Coverage Driven Test Generator for Processor Design Verification
Author(s):
David Brownell, Tushar Ringe [Analog Devices]
Paper
Presentation
SNUG Silicon Valley Keynote
Massive Innovation and Collaboration into the "GigaScale" Age!
- Synopsys
SNUG Silicon Valley Keynote
From Crystal Ball to Reality: The Impact of Silicon IP on SoC Design
- Imagination Technologies
Snug Proceedings
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