SNUG Taiwan 2011 Proceedings

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Complete Proceedings


User Papers and Presentations
FA1 - Low Power Implementation
A UPF Low Power Tapeout Project Case Study
Author(s): JianPing Chang [Progate Group Corp.]
Presentation

Improving Turn-Around Time in Gas Station Design by Us-ing IC Compiler UPF Mode
Author(s): Yun-ChihChang [Realtek]
PaperPresentation

Low Power ARM CortexA9 Using ICC UPF Flow
Author(s): Tony Ku [TSMC]
PaperPresentation

UPF-Based MV+MCMM ImplementationExperience
Author(s): Jackie Wu [HT mMobile]
PaperPresentation

FA2 - Functional Verification/Low Power
Experience on Low Power Verification
Author(s): Vincent Lin [Via Labs]
Presentation

Making Compile Faster using VCS Partition Compile
Author(s): Xiao-Cheng An, Chung-Yuan Cheng, Yung-Jen Chen [Realtek]
Presentation

Techniques of Automatic Functional Coverage Convergence (Best Paper Award)
Author(s): Shang-WeiTu [Sunplus]
PaperPresentation

Using VMM RAL to Effectively Verify Complex User-specific Registers (Technical Committee Award Honorable Mention)
Author(s): Yung-Jen Chen [Realtek]
PaperPresentation

FA3 - Fast SPICE
Adv. node SRAM Design Verification with CustomSim(XA)
Author(s): Hsin-Wen Chen [UMC]
PaperPresentation

An Efficient and Accurate Instance-based Power Characterization Method for Nano-meter Memory Compiler (Technical Committee Award Honorable Mention)
Author(s): David Wu, Goldberg Lin, Willis Shih, Steve Tsai [Faraday]
PaperPresentation

Hybrid IR/EMAnalysis Flow with EM Rule Extension
Author(s): Gary Chan 詹偉閔 [TSMC]
Presentation

Simulation Success with HSIM in DDR DRAM Design
Author(s): Jason Pang [ETRON]
PaperPresentation

FB1 - Low Power Implementation/ DFM
Proteus LRC Evaluate in OPC Application
Author(s): Jiunhau Fu [Nanya]
Presentation

FB2 - System Level Solution/Low Power
Customized Programmer’s View Multi-DSP Virtual Platform for SW Development
Author(s): Bruce Huang [ITRI]
Presentation

System Power Analysis with DVFS on ESL Virtual Platform (Best Paper Award)
Author(s): Wen-TsanHsieh [ITRI]
PaperPresentation

FB3 - Fast SPICE/ESP
Custom Memory Formal Checking methodology in using ESP Shell
Author(s): Chunhao, Charlie Yu [TSMC]
Presentation

HSIM Flash Cell Model for NAND Flash
Author(s): Rocky Lo [Macronix]
PaperPresentation

TA1 - Physical Implementation/Verification
Explore Optimization Opportunities with Lynx Design System
Author(s): Kerwin Fu [Himax]
Presentation

Tackling 1GHz Dual-core Cortex A9 using Synopsys ICC tool (Best Paper Award)
Author(s): CC Mao [Global Unichip]
Presentation

TSMC Reference Flow 12.0 Overview
Author(s): Wen-Hao Chen [TSMC]
Presentation

UMC-Synopsys 40nm UPF Low Power Reference Flow
Author(s): Zed Chiu [Global Unichip]
Presentation

TA2 - Synthesis/STA/Test
Experience Sharing on Fast Timing ECO Using PrimeTime
Author(s): 孫維敏張進朝陳玉娟 [Nuvoton]
PaperPresentation

Exploring DFT Methodologies for 3D Integration Chip
Author(s): Chen-An Chen, Yee-Wen Chen, Ming-Hsueh Wu, Kun-Lun Luo, Liang-Chia Cheng [ITRI]
PaperPresentation

Solving Congestion and Improving Correlation using Design CompilerGraphical with Physical Guidance
Author(s): Jason Wang [Novatek], George Wang [Synopsys]
Presentation

TA3 - Fast Prototyping
HDTV Prototyping Performance Comparisons Between HAPS54 and HAPS64
Author(s): Jovi Su [SiS]
Presentation

Success of DSP Prototype with HAPS51T
Author(s): Chih-Wei Huang [ITRI]
Presentation

TB1 - Physical Verification/Implementation
Apply ICC Methodology in Implementation Flow
Author(s): Alan Hsu [SiS]
Presentation

TB3 - Fast Prototyping/Certify/IP
Certify in multi-FPGA partition
Author(s): Gary Tseng [Altek]
Presentation

RTL Partition for HAPS with Certify -- Rapid Prototyping on Multi-FPGA
Author(s): Feng-Chi Chen [ITRI]
Presentation

Tutorials
FB1 - Low Power Implementation/ DFM
New Multivoltage Techniques for Reducing Power During Design Implementation
Author(s): Peter Tseng, Roger Wei [Synopsys]
Tutorial

FB2 - System Level Solution/Low Power
Low Power Verification Tutorial
Author(s): Tiger Hsu [Synopsys]
Tutorial

FB3 - Fast SPICE/ESP
Parallel Computing with HSPICE
Author(s): Eric Tsai [Synopsys]
Tutorial

TA2 - Synthesis/STA/Test
Faster Multi-Scenario ECO Fixing in PrimeTime
Author(s): Jerry Fang [Synopsys]
Tutorial

TA3 - Fast Prototyping
Advanced Capabilities and Design Interaction withFPGA-Based Prototyping
Author(s): Freddy Lin [Synopsys]
Tutorial

TB1 - Physical Verification/Implementation
Enabling Delivery of High-Performance ARM Cortex-A Series Processor Cores
Author(s): Geo Lin [Synopsys]
Tutorial

ICV Runset debugger
Author(s): Sentry Shieh [Synopsys]
Tutorial

TB2 - Test
DFTMAX, TetraMAX, and the STAR Memory System
Author(s): Craig Tou [Synopsys]
Tutorial

TB3 - Fast Prototyping/Certify/IP
USB 3.0 IP: The Path from Concept to Certified Products
Author(s): Tom Liu [Synopsys]
Tutorial

Panel Presentation
AMS Panel Discussion
Author(s):