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SNUG Taiwan 2007 Proceedings

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User Papers and Presentations

Implementation

Automatic Functional ECO Flow: Iterative Synthesis Approach Using Design Compiler
Author(s): Ling-Bin Guo [Infineon Technologies]

Bridging Front-End and Back-End Survey of Design Compiler Topographical Technology
Author(s): C.T.Kao , J.D.Pan , K.C. Wu [Faraday Technology Corporation]

CCS Timing and Correlation Methodology
Author(s): Ivy Yang [UMC]

Low Power Emphasized PAC DSP Implementation (1st Place - Best Paper, Implementation)
Author(s): Chiao-Ling Lung [Industrial Technology Research Institute]

Migration from Astro to IC Compiler
Author(s): Dane Tsai [Progate Group Corporation Inc.] CP Lin, Jocelyn Lee [Synopsys, Inc.]

New IP Deliverables for a Unified IP Simulation/STA Flow Using ILM+ (2nd Place - Best Paper, Implementation)
Author(s): Ean Tzeng, J.D. Pan [Faraday Technology Corporation]

Power Modeling and Characterization - The Case with CCS
Author(s): Mexx Lin, Peter Pong, Gary Chiou, Jerry Hong, Steve Tsai [Faraday Technology Corporation]

Router Driven Automated Correction of Lithography Hotspots
Author(s): Daniel Zhang, Sam Tong, Alexander Miloslavsky, ZongWu Tang [Synopsys, Inc.]

Verification

High Voltage SPICE Model
Author(s): Ho Chiachi [TSMC]

Integrating Verilog Bus Functional Models in VMM Environment
Author(s): Gaurang Gupta, Jitendra Puri, Nitin Gupta [nSys Design Systems]

Simulation Success on TSMC 45nm/65nm SRAM
Author(s): Liao Hong-Ren [TSMC]

SoC Interconnection Bus and Memory Controller Functional and Performance Verification using Magellan & VCS with SVTB VIP and AIP
Author(s): Cheng-Hsien Chen, Chuan-Yu Chiou [Sunplus Technology]

SoC Verification using VMM-Methodology (1st Place - Best Paper, Verification)
Author(s): Charles C. C. Liu [TSMC]

Tutorials

Tutorials

Accelerated Design Convergence with IC Compiler – Concurrent Multi-Mode, Multi-Corner (MCMM) and Signoff Driven Closure
Author(s):

Circuit Analysis to Achieve Better, Faster Mixed Signal Design
Author(s):

Debugging with Discovery Visualization Environment
Author(s):

Galaxy Test Automation
Author(s):

NanoSim-VCS Mixed-Signal Co-Simulation
Author(s):

SNUG Silicon Valley Keynote

Massive Innovation and Collaboration into the "GigaScale" Age! - Synopsys

SNUG Silicon Valley Keynote

From Crystal Ball to Reality: The Impact of Silicon IP on SoC Design - Imagination Technologies

Snug Proceedings

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