SNUG Singapore 2011 Proceedings
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Complete Proceedings
User Papers and Presentations
Backend Track
User Paper: Achieving Modularity in ASIC RTL-to-GDS Execution for IP SOC Products
Author(s): Julian Chan Yew Seng, Wan Chin Yeun, Wong Thian Min [Intel]
PaperPresentation

User Paper: Advanced STA Methodology To Generate Accurate Timing Model Using NanoTime
Author(s): Cherry Pua Siaw Fuang, Chong Lee Kuay, Boon Tang Teh [Altera], Sahil Bargal [Synopsys]
PaperPresentation

User Paper: Channel-Based HIP Design Extraction Methodology (2nd Place - Best Paper, Backend Track)
Author(s): Lee Yoke Sun, Chong, Han Yao [Intel]
PaperPresentation

User Paper: Customized ILM Flow for Implementation of Multivoltage Designs (1st Place - Best Paper, Backend Track)
Author(s): Jonathan Kok Ka Cheung, Goh Seng Han, Cheah Yew Sang [Intel]
PaperPresentation

User Paper: Developing XFAB PDK Kit For Synopsys Custom Designer
Author(s): Then Choo Kiong [X-Fab]
PaperPresentation

User Paper: Fast Forward with In-Design Lithography DFM using DRC+ in Synopsys ICC / ICV (3rd Place - Best Paper, Backend Track)
Author(s): Cristopher Magalang, Edward Teoh, Sky YEO Wee Kwong [GLOBALFOUNDRIES]
PaperPresentation
Frontend Track
User Paper: FPGA Power Modeling Methodology
Author(s): Siak Khing Teh, Gurvinder Tiwana, Ang Boon Chong, Chong Lee Kuay [Altera]
PaperPresentation

User Paper: Guidelines for Verification Monitors with Method for Automated Creation of Protocol Compliance Coverage Models
Author(s): Marizonne O. Fuentes, Noeme P. Mateo [BiTMICRO Networks]
PaperPresentation

User Paper: MPEG-4 Decoder IP Verification Using Verification Methodology Manual
Author(s): Vinh Ngo Quang, Thien Le Ha, Hanh Luyen Duc [Integrated Circuit Design Research & Education Center]
PaperPresentation

User Paper: Nanometer Low Power Challenges and Innovative Solutions for Chip Implementation (1st Place - Best Paper, Frontend Track)
Author(s): Elisha Prashanth Sagar Nandavaram, Tze Haw Liew, [GLOBALFOUNDRIES], Wendy Chen [Synopsys]
PaperPresentation

User Paper: RVM Based CPU Model (2nd Place - Best Paper, Frontend Track)
Author(s): Noeme P. Mateo [BiTMICRO Networks]
PaperPresentation

User Paper: Synthesizable Verification IP to Stress Test System-on-Chip Emulation and Prototyping Platforms (3rd Place - Best Paper, Frontend Track)
Author(s): Xu Bing Tao, Jayaratnam Siva Shankar, Subramanian Shiva Shankar [Lantiq]
PaperPresentation
Tutorials
Breakout Sessions
DC Explorer Tutorial: Accelerates Design Implementation through Early Exploration
Author(s): Don Chan [Synopsys]
Tutorial

FPGA Tutotial: Advanced Capabilities and Design Interaction with FPGA-Based Prototyping
Author(s): Freddy Lin [Synopsys]
Tutorial

ICC Tutorial: Final Stage Leakage Power Recovery
Author(s): Lam Lup Meng [Synopsys]
Tutorial

ICC Tutorial: Shorten Design Cycle using ICC Feasibility Methodology
Author(s): Yeong Kig Ling [Synopsys]
Tutorial

PrimeTime Tutorial: Faster Multi-Scenario ECO Fixing with PrimeTime® STA
Author(s): Jagan Thinakaran [Synopsys]
Tutorial

TCAD Tutorial: TCAD Sentaurus F-2011.09 Release Preview and Advanced CMOS Applications
Author(s): Kevin Lin [Synopsys]
Tutorial

Tutorial: Enabling Delivery of High-Performance ARM Cortex-A Series Processor Cores
Author(s): Teng Zhao Wei [Synopsys]
Tutorial
Speech
General Session
Ten Best Practices for your Design Methodology
Author(s): Don Chan [Synopsys]
Tutorial


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