SNUG Singapore 2009 Proceedings
2012|2011|2010|2009|2008
 Sort proceedings by:


Complete Proceedings
User Papers and Presentations
User Sessions
Advanced Clock Tree Design Implementation Using IC-Compiler CTS Tool
Author(s): Teng, Siong Kiong [Intel Corporation]
Paper

An Asynchronous Implementation of a 32-bit DLX Microprocessor
Author(s): Christian Loyd Dumaguing [Intel Corporation]
Paper

An Automated Approach for Evaluating Spatial Correlation in Mixed Signal Designs Using Synopsys HSpice®
Author(s): Omid Kavehei [The University of Adelaide]
Paper

Analysis Of Layout Impact On Device And Circuit Performance Using Synopsys Seismos-LX
Author(s): Shesh Mani Pandey [Chartered Semiconductor]
Paper

Clock Tree Skew Variation Modeling Using PrimeTime AOCVM
Author(s): Teng Siong Kiong, Wong Vee Kin [Intel Corporation]
PaperPresentation

Custom rule development on LEDA with C/C++: An effective way to boost the design quality
Author(s): Kenichi Sakai [Renasas Design]
Paper

ECO Patch Cone Optimization Flow using Design Compiler
Author(s): Thoon, Kok Ping [Intel Corporation]
Paper

Global Clock Distribution Network Implementation Flow Using IC Compiler
Author(s): Avinash Rajah, Teng Siong Kiong [Intel Corporation]
PaperPresentation

Improving Simulation Productivity, Accuracy and Efficiency using Star-RCXT Parasitic Extraction and HSIM
Author(s): Ai-Ling Yong [Altera Corporation]
Paper

Post Layout Ultimate Leakage Power Optimization via PrimeTime-based Gate Sizing Capability
Author(s): Tee, Luck Kuan [Intel Corporation]
PaperPresentation

Power Gating Design Consideration and Verification
Author(s): Eric Guan [Infineon Technologies]
PaperPresentation

Power Switch Analysis
Author(s): Ang Boon Chong [Altera Corporation]
Paper

Statistical STA Motivation, Methodology and Challenges
Author(s): Prashanth Sagar [Chartered Semiconductor]
PaperPresentation

Transition from Dynamic Simulation to Static Timing Analysis: Analyzing a Digital Memory Interface Logic using NanoTime
Author(s): Yun Mei Lim [Altera Corporation]
PaperPresentation
Tutorials
Efficient Constraint Solving and Debugging in VCS
Author(s):
Tutorial

ICC Signoff Driven Design Closure
Author(s):
Tutorial

PT 2009.06 ECO fixing highlightsTutorial
Author(s):
Tutorial


  © 2013 Synopsys, Inc. All Rights Reserved.
Contact us  |  Locations  |   Privacy  |  Legal   RSS   Twitter   LinkedIn   Facebook   YouTube