SNUG Israel 2011 Proceedings

A5 Tutorials & User Paper - STA updates and user experience

IO STA with PrimeTime - It has never been easier!
Author(s): Yossi Rindner, Ohad Meshulam [AsicServe]

A6 Tutorials - Analog Mixed-Signal

Custom Explorer Ultra
Author(s): Dwayne Holst [Synopsys]

B2 Tutorial & User Experience - FPGA and IP experience

Gated clock & DW handling in FPGA platforms
Author(s): Shmaryh Einav [Texas Instruments]

B5 User Papers - Low Power & STA Experience

Combining CDC Analysis and STA Tools for MCD SoC Verification
Author(s): Reuven Dobkin, Dov Alon [Ramon Chips]

Signoff leakage optimization
Author(s): Shmulik Ajubel [LSI]

Top Level - UPF (Technical Committee Award)
Author(s): Yoav Kretchmer [Marvell]

C1 User Papers - Verification Experience

Interface handling using SystemVerilog testbench
Author(s): Max Krumer [Discretix Ltd.]

SoC-Online
Author(s): Doron Meiraz [Synopsys]

Who Took My VDD Away (Technical Committee Award)
Author(s): Ron M. Bar, Eran Glickman, Benny Michalovich [Freescale Semiconductors]

C2 User Experience & Tutorial - System Level Design

PCIe Connection with Innovator
Author(s): Ronny Hiersch [Intel]

C6 Tutorial & User Paper - Design for Test

DFT architecture in multimedia design (1st Place - Best Paper)
Author(s): Gil Bouganim [DSP Group]

Tutorials

A1 Tutorial

Power Aware Verification Methodology
Author(s): Tushar Parikh [Synopsys]

A2 Tutorial & Vision Session - System Level Design

A View From the Top
Author(s): Eshel Haritan, Janick Bergeron [Synopsys]

A3 Tutorial & Vision Session - System Level Design

A View From the Top
Author(s): Eshel Haritan, Janick Bergeron [Synopsys]

A4 Tutorial & User Experience - Design productivity with DC Explorer and SPG flow

Design Productivity with DC Explorer
Author(s): Eyal Odiz [Synopsys]

A5 Tutorials & User Paper - STA updates and user experience

Faster Multi-Scenario ECO Fixing in PrimeTime
Author(s): Simon Bloyce [Synopsys]

Hyperscale Solution for Large Designs
Author(s): Simon Bloyce [Synopsys]

A6 Tutorials - Analog Mixed-Signal

Parallel Compute Technology Advantage in HSPICE
Author(s): Isaac Zafrany [Synopsys]

B1 Tutorial

Advanced verification methodologies with UVM 1.0
Author(s): Janick Bergeron [Synopsys]

B2 Tutorial & User Experience - FPGA and IP experience

ARC Processors configuration and implementation on FPGA platform
Author(s): Yair Dahan, Shlomi Dan [Synopsys]

B3 Tutorial

Reducing Static Power Consumption in Advanced SoC Designs Using Long and Multi-Channel Logic Libraries
Author(s): Deepak Sherlekar [Synopsys]

B4 Tutorial

A scalable methodology for fast convergence of large designs
Author(s): Eli Dagan, Zvi Webb [Synopsys]

B6 Tutorial & User Experience - Custom Design

iPDK Development in Custom Designer Environment
Author(s): Ofer Tamir, Nisim Cohen [Tower Semiconductor]

Synopsys Custom Design Solution
Author(s): Rudy Walter [Synopsys]

C2 User Experience & Tutorial - System Level Design

Scaling High-Level Synthesis for Complex Image and Video Processing Designs
Author(s): Frederic Genin [Synopsys]

C3 Tutorial

Designing Mobile Multimedia SoCs with Low-Power, High-Performance IP Solutions
Author(s): James Wu [Synopsys]

C6 Tutorial & User Paper - Design for Test

Compression, TetraMAX ATPG, and the STAR Memory System Updates
Author(s): Adam Cron [Synopsys]