The SNUG Canada Call For Papers is now closed. For more information, please contact the SNUG Team at firstname.lastname@example.org
For the complete author submission timeline, please view the Author's Kit.
Share your experiences with Synopsys User's Group (SNUG); one of EDA's largest and most important events. For more than 20 years, SNUG has provided a unique forum for design professionals to learn about the latest in EDA technology, and how it is being used by many of the top companies to solve difficult design challenges and to improve design productivity, predictability, and profitability.
- By following a simple outline and structure and with support from the SNUG technical committee, you can write and present an award winning paper at SNUG. Here are some of the elements of past top papers:
- Introduce the problem or challenge that you are addressing.
- Describe the approach that you took to analyze and address your challenge.
- Review lessons learned along the way (what was expected/unexpected, what went well/not so well).
- Why is your solution a good one? What can other designers take away and use from your paper?
- What are some ongoing areas of development or next steps that you (or an audience member) could pursue?
- Summarize your effort and results.
If you have used Synopsys technology to overcome difficult design issues, we want to hear from you! SNUG will cover exciting areas such as 40/45nm and 28/32nm design, as well as share insights and techniques to address challenges in low power, high-level or physical design methodology, RTL-to-GDSII design flows, FPGA design and verification, system simulation and verification and mixed-signal design.
Preliminary topics include (but are not limited to):
- IC Implementation (Synthesis, Physical Design, Test, DFM, Low Power, etc)
- IC Verification (RTL, Transistor, Mixed Signal, Power, etc)
- IC Signoff
- FPGA (Design, Prototyping)
- Custom Design