| Time | Description |
| 8:00-9:00 | Registration and Breakfast |
| 9:00-10:30 | Welcome and Keynote |
| 10:30-10:45 | Break |
| | Verification | Custom Implementation and Verification | IC Design - Implementation | Design Implementation |
| 10:45-12:15 | MA1 User Session:
Reuse and Methodology | MA2 Tutorial & User Session:
Custom Designer Accelerators and Revision Control | MA3 Tutorial Session:
Signoff-Driven Design Closure, and Route Correlation | MA4 User and Tutorial Session:
Test Coverage and Design Exploration |
| 12:15-1:15 | Lunch |
| 1:15-2:45 | MB1 Tutorial & User Session:
DVE and Low-Power Verification | MB2 Tutorial Session:
Preventing Electromigration and ERC/ESD | MB3 Tutorial Session:
Top Level Closure and Multi-IO Ring Design | MB4 Tutorial Session:
ECO Timing Closure & PrimeTime/PrimeTime SI |
| 2:45-3:10 | Break |
| 3:10-4:40 | MC1 User Session:
Stimulus Generation, Constraint Random and Error Injection | MC2 Tutorial Session:
Advanced Interactive Debugging Utilities in ICV | MC3 Tutorial Session:
High Performance Cores and 20nm Design Success | MC4 User & Tutorial Session:
Constraint Analysis |
| 4:40-6:30 | SNUG Pub and Awards Presentations |