Wednesday, June 12, 2013Time: 5:15pm - 7:30pm
Open to all SNUG India Registered Attendees. SNUG India Designer Community Expo is your chance to learn more about the design enablement solutions available from Synopsys and our ecosystem partners. Stop by and talk to design solution experts for demonstrations and get answers to your technical questions. You can also network with colleagues and enjoy complimentary food and beverages.
SNUG India 2013 DCE Exhibitors:
Compute and Design Infrastructure
Community focused on compute technologies for EDA, including hardware, operating systems, licensing, multi-core, data management, cloud computing and other infrastructure applications providers
 | Gold Sponsor | Gold Sponsor |  | | |
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Custom Design and AMS Verification
Community focused on custom design and AMS verification flows, including schematic entry, layout, schematic-driven layout, P-cell, analog/ mixed-signal/ signal integrity simulation and custom design/AMS ecosystem partners (PDK foundry support/standards )
FPGA
Community focused FPGA design and verification flows, including FPGA synthesis, implementation, and debug, and FPGA ecosystem partners (FPGA vendor platforms & device support)
 Silver Sponsor |  |  |  Gold Sponsor | | |
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IC Design
Community focused on cell-based design and flows, including design planning, RTL synthesis and test, physical implementation and verification, signoff and supporting IC design ecosystem partners (Library vendors, foundries and standards)
IC Verification
Community focused on functional verification and debug flows, including mixed-HDL simulation, testbench automation, verification IP, formal analysis, rapid prototyping and IC verification ecosystem partners (VIP vendors/standards)
IP
Community focused on IP solutions for IC/SoC designs, including Interface, analog, low power and processor IP titles, protocols, process nodes, design-in and verification solutions, and IP ecosystem solution partners/standards
System-Level Design
Community focused on system-level design to IC design flows, including pre-silicon software development, design partitioning (ASIC/FPGA/IP Reuse), system-level synthesis/modeling/algorithms, and system design vendors/standards