Thursday, September 11, 2014
Time: 4:45 - 7:00pm
Location: Salon D-H
This event is open to all registered attendees of SNUG Boston.
Wrap up your day at SNUG by relaxing with your fellow conference attendees. Grab a beverage and sample the food. Learn which papers SNUG attendees vote to recognize with the "Best Paper" awards. Visit with Synopsys and our partners who will demonstrate integrated solutions to help you overcome your design challenges, and have an opportunity to win one of the great prizes at the Designer Community Expo.
Here are the companies that participated in the SNUG Boston DCE 2013. Check back for the 2014 list of exhibitors.
Compute & Design Infrastructure
Community focused on compute technologies for EDA, including hardware, operating systems, licensing, multi-core, data management, and compute/design infrastructure providers
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Custom Design & AMS Verification
Community focused on custom design and AMS verification flows, including schematic entry, layout, schematic-driven layout, P-cell, analog/ mixed-signal/ signal integrity simulation and custom design/AMS ecosystem partners (PDK foundry support/standards)
Community focused on FPGA design and verification flows, including FPGA synthesis, implementation, and debug, and FPGA ecosystem partners (FPGA vendor platforms & device support)
Community focused on cell-based design and flows, including design planning, RTL synthesis and test, physical implementation and verification, signoff and supporting IC design ecosystem partners (Library vendors, foundries and standards)
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Community focused on functional verification and debug flows, including mixed-HDL simulation, testbench automation, verification IP, formal analysis, FPGA-based prototyping and IC verification ecosystem partners (VIP vendors/standards)
Community focused on IP solutions for IC/SoC designs, including interface IP, analog IP, datapath IP, processors, embedded memories, logic libraries and ecosystem solution partners/standards
Prototyping & System Design
Community focused on system-level design to implementation-ready RTL, including: high-level block design (HLS, algorithms, and custom processor design); architecture analysis and optimization; pre-silicon software development, integration, and system validation; and ecosystem system design vendors/standards