Samsung-Synopsys Collaboration 

Advanced Logic Foundry Services for Your Design Success 

SAMSUNG
Samsung Foundry and Synopsys provide optimized design and manufacturing solutions for the most competitive fabless and integrated device manufacturer semiconductor companies. Samsung Foundry offers deep expertise in advanced process and design technologies as well as an excellent track record in high-volume manufacturing, for design engagements to turnkey projects, with a focus on leading-edge process technologies including 28nm and 14nm. Synopsys and Samsung have teamed to offer broad and deep node enablement for all of these processes, including qualified tools and flow support and node-optimized IP.

Collaboration Accelerates Fast Ramp to Samsung 14-nm FinFET Process for Advanced Mobile SoC Design
The shift from planar to FinFET-based 3D transistors is a significant change that required close technical collaboration between tool developers, foundries and early adopters to deliver an optimized EDA solution. Synopsys’ multi-year FinFET collaboration with Samsung has accelerated adoption of FinFET technology for faster and more power efficient Systems on Chips (SoC)s.

Samsung Graphic

Synopsys’ FinFET-ready DesignWare IP
Synopsys working closely with Samsung developed an industry first test chip that helped validate Samsung’s advanced 14-nm FinFET process as well as Synopsys’ DesignWare Embedded Memories using Synopsys’ Self-Test and Repair (STAR) Memory System® solution. The test chip enabled the correlation of the simulation models to Samsung’s FinFET process and contained test structures, standard cells, a PLL and embedded SRAMs. The memory instances included high-density SRAMs designed to operate at very low voltages and high-speed SRAMs to validate the process performance.

Comprehensive Design Implementation Solution for Samsung’s 14-nm FinFET Process
Synopsys’ new fast-field solver technologies to model the effect of 3-D structures for parasitic extraction, accurate high-performance models for device simulation, and comprehensive support for new rules for physical design implementation are the foundation for the Galaxy™ Implementation Platform. The platform, optimized for Samsung 14-nm technology, includes IC Compiler™ physical design, IC Validator physical verification, StarRC™ parasitic extraction, SiliconSmart characterization, CustomSim™ and FineSim for FastSPICE simulation, and HSPICE® device modeling and circuit simulation.