| Oct 17, 2012 | Synopsys Wins TSMC's 2012 "Interface IP Partner of the Year" Award
Excellent Customer Support, Technical Leadership and Number of Customer Tape-Outs Cited as Key Selection Criteria
|
|
| Oct 17, 2012 | TSMC Awards Synopsys "Partner of the Year 2012" for 20nm Reference Flow
The award recognizes Synopsys' broad and deep technical expertise and shared commitment to the development and delivery of TSMC’s 20nm reference flow
|
|
| Oct 15, 2012 | Synopsys and TSMC Collaborate for 20nm Reference Flow
Design Tools in Synopsys® Galaxy™ Implementation Platform selected in 20nm Reference Flow for Physical Implementation, RC Extraction, Timing Analysis and Physical Verification
|
|
| Jun 02, 2011 | Synopsys and TSMC Collaborate to Deliver Custom Design Solution for 28nm Analog/Mixed-Signal Reference Flow 2.0
Synopsys Galaxy Custom Designer Provides New Capabilities to Address Advanced Process Node Design Challenges
|
|
| Nov 17, 2010 | Synopsys' IC Validator Completes Qualification for TSMC's 40-nm and 65-nm iDRC/iLVS Physical Verification
Runset Availability Enables Faster Tapeouts with In-Design Physical Verification
|
|
| Oct 21, 2010 | Synopsys Awarded TSMC's 'Interface IP Partner of the Year'
Delivers a Broad Portfolio of High-Quality, Silicon-Proven IP for TSMC Processes
|
|
| Aug 09, 2010 | Synopsys Galaxy Implementation Platform Used by TSMC for 28nm Process
Product Qualification Vehicle Test Chip Tapeout Includes Advanced Routing Rules, Low Power and Signoff Capabilities
|
|
| Jun 09, 2010 | Synopsys Delivers Comprehensive Custom Design Solution for TSMC Analog/Mixed-Signal Reference Flow 1.0
TSMC and Synopsys Collaborate to Validate Galaxy Custom Designer Solution with TSMC 28nm iPDK
|
|
| Jun 09, 2010 | Synopsys Delivers Comprehensive Design Enablement for TSMC 28-nm Process Technology with Reference Flow 11.0
Addition of System-Level and In-Design Technology Support Further Enables a Path to Optimized Silicon
|
|