Hardware Design & Verification for ARM Powered® Products    

 

ARM and Synopsys collaborate to enable design and verification of SoCs based on ARM® processors and the ARM AMBA® protocols.

Designers can quickly create subsystems based on the ARM AMBA 2, AMBA 3 AXI and AMBA 4 AXI ACE Lite™ protocols using Synopsys' full suite of configurable fabric IP and peripherals as well as the coreAssembler tool to automate block configuration and assembly. Synopsys Platform Architect allows designers to analyze and tune the performance of interconnect and memory subsystems based on the ARM AMBA protocols. To enable more rapid and productive verification of ARM-based SoCs, Synopsys and ARM have collaborated on many initiatives, including: SystemVerilog, verification methodology, simulation performance, low power verification, debug and verification IP for AMBA interconnect.

  • Optimized Solutions
 

 
Industry-leading designers of today's most advanced designs rely on the Synopsys VCS® functional verification solutions for their verification environments. In fact, a high majority of designs at 32nm and below are verified with VCS. ARM and Synopsys have collaborated to optimize VCS simulation performance and debug efficiency for SoCs based on ARM's latest CPU and GPU processors.

VCS has continually pioneered numerous industry-first innovations, and is poised to meet the challenges of verifying today's most complex ARM-based SoCs. With features such as such as constrained random testbench, SoC optimized compile flow, debug, coverage, assertions, planning and management, VCS has the flexibility and capabilities that are critical for today's SoC design and verification teams' success.


 
Synopsys' debug solution, built on top of the Verdi3™ advanced debug platform, enabling debugging complex issues for ARM-based SoCs. Verdi3 debug platform is the industry's leading debug automation technology that delivers design debug needs all the way from RTL to gate-level design. The Verdi3 advanced debug platform provides a wide selection of leading technologies such as Siloti, for advanced testbench debug, Verdi 3 Power-Aware Debug, for low power debug, Verdi3 HW SW Debug, for instruction-accurate embedded ARM processor debug, and ProtoLink, for prototype debug.


 
Advanced verification technology is now required to meet the challenge of delivering the verification performance required for the latest ARM-based SoCs. Synopsys’ ZeBu emulation solutions delivers 100% visibility debug, automated software, and the highest performance and capacity in the industry. These solutions include ZeBu-Server for emulation, zFast, ZEMI-3, ZeBuWare and transaction-based VIP, for fast bring-up time, and ZeBu Debug, a comprehensive suite of emulation-based debug tools.


 
The Discovery™ Verification IP for ARM AMBA interconnects provides extensive support for AMBA protocols, including AMBA 5 CHI, AXI4, AXI4-Lite, ACE, ACE-Lite, AHB and APB protocols. Written entirely in SystemVerilog for highest performance and best ease-of-use, the Discovery Verification IP includes many features aimed at accelerating time to first test, debug and coverage closure. A system-wide monitor tracks activity across the entire interconnect to verify coherency and data integrity.


 
Synopsys offers designers a broad portfolio of complete, silicon-proven IP solutions for the most widely used interfaces such as PCI Express, USB, DDR, SATA, HDMI, MIPI, and Ethernet. With a strong investment in developing high quality IP, designers can trust that the IP will interoperate and integrate successfully into the SoC with less risk and improved time to market.

DesignWare IP is fully compatible with the ARM AMBA 2.0, AMBA 3 AXI™, and AMBA 4 AXI protocols including ACE-Lite, allowing flexible system architectures to fully support designers' requirements. The configurable architecture of the IP, coupled with the automated assembly tool, reduces the complexity of designing next-generation AMBA-based subsystems and significantly improves overall productivity for faster time-to- results. The combinations of these differentiated offerings provide an IP solution that is unmatched in the industry.


 
The Synopsys DesignWare IP solutions for ARM AMBA® protocol-based designs include a comprehensive set of synthesizable and verification IP and an automated method for subsystem assembly with the Synopsys coreAssembler tool. DesignWare IP is fully compatible with the ARM AMBA 2.0, AMBA 3 AXI™, and AMBA 4 AXI protocols including ACE-Lite, allowing flexible system architectures to fully support designers' requirements. Components include bus fabric and infrastructure, DMA controller, DDR/static memory controller and APB general and advanced peripherals.


 
Synopsys' signoff-proven low power static checking and voltage-level aware simulation products form the most accurate and comprehensive solution for verification of low power ARM-based designs, including advanced techniques requiring fine-grained voltage control. The Synopsys low power verification solution is also fully integrated with Synopsys' core verification capabilities, including low power assertions, coverage and debug, and new verification technologies, including Xprop.


 
Platform Architect is a SystemC TLM standards-based graphical environment for capturing, configuring, simulating, and analyzing the system-level performance of interconnect and memory subsystems of multicore systems for next-generation ARM AMBA-based SoC architectures.


 
Synopsys' DesignWare Embedded Memories and Logic Libraries are used extensively for the implementation of advanced processor cores, enabling designers to achieve ultra-high performance while staying within power and area budgets. The DesignWare HPC (High Performance Core) Design Kit offers additional cells and memories specifically optimized to deliver improved performance and power for all processor cores. In addition, Synopsys' STAR Memory System® for embedded memory test and repair supports leading processor test buses, making it possible to test memories without impacting processor core performance.