Visit Synopsys at Booth 712 to see how our collaboration with ARM® addresses
leading-edge challenges for system-on-chip design. Technology and collaboration
featured in the booth include:

• 32nm DesignWare® IP
• Confirma Rapid Prototyping
• FPGA Implementation
• Lynx Design System
• Virtual Prototyping

Special Technical Session Breakfast

Vertically Optimized 32/28 nm Solution for Mobile SoC Design
Wednesday, October 21st, 9:00am - 10:30am - Santa Clara Convention Center Center Ballroom H

Agenda:
8:30-9:00am - Registration and Continental Breakfast
9:00-10:30am - Program

Speakers:

• Dr. Jaga Jagannathan, Director, 32/28 Technology Productization, IBM Semiconductor R&D Center
• Dr. Dipesh Patel, Vice President of Engineering at ARM's Physical IP Division
• Glenn Dukes, VP of Professional Services, Synopsys, Inc.

This special 3-way go-deep session hosted by ARM, the Common Platform™ (IBM, Chartered Semiconductor Manufacturing and Samsung Electronics) alliance, and Synopsys introduces a new level of collaboration necessary to address the cost and technical challenges associated with advanced mobile SoC design and manufacturing. As semiconductor technology approaches fundamental physical limits and design complexity reaches unprecedented levels, a deeper type of technical alignment.

Learn how this extended collaboration enables customers to deliver optimized ARM®-based 32/28LP mobile SoC designs whilst achieving faster time-to-market at reduce risks and design costs. We explain how this collaboration is enabling a proven turnkey design solution for optimizing innovation and accelerating your design with best-in-class technology, physical and processor IP and tool/flow solutions for the Common Platform's 32nm/28nm high-k metal-gate (HKMG) process technology.
Full Abstract

Seating is limited, so please register now (walk-ins welcome based on space availability).
Attend the session and enter to win a Nintendo Wii.

Learn more about our new 32nm Collaboration with ARM and the Common Platform Alliance at the following booths:

• Common Platform Booth 609
• ARM Booth 501
• Synopsys Booth 712

Conference Sessions:

Date Time Title Speaker Oct 21 10:00am - 10:45am Room 203 High-Performance, Lower-Power, Reduced Route Architecture for the AMBA 3 AXI On-Chip Interconnect Fred Roberts Oct 21 16:00pm - 16:45pm Room 202 Optimized Implementation of GHz ARM Cortex-A8 Processor - High performance with Low Power Daniel Biset Oct 23 10:00am - 10:45am Room 209 Increasing Software Development Productivity with ARM and Synopsys Modeling Solutions Frank Schirrmeister Oct 23 11:00am - 11:45am Room 202 Solving Common Power Management Verification Issues in ARM-Based SoCs Bhanu Kapoor, Shankar Hemmady, ShireeshVerma    Oct 23 1:00pm - 1:45pm Room 202 Optimized Implementation of GHz ARM Cortex-A9 Processor - High performance with Low Power Daniel Biset

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