System-Level Catalyst Member 

Xilinx 
Xilinx Logo We are pleased that Synopsys' Synplicity Business Group is working together with Xilinx to integrate the latest Xilinx devices into their HAPS prototyping systems. The System-Level Catalyst program allows Synopsys and Xilinx to validate interoperability of our hardware and software offerings to ease the adoption of our joint solution by our mutual customers.

- Tom Feist, Senior Marketing Director, ISE Design Suite, Xilinx


Product Description
Virtex®-6 FPGAs are the programmable silicon foundation for Targeted Design Platforms that deliver integrated software and hardware components to enable designers to focus on innovation as soon as their development cycle begins. Using the third-generation ASMBL™ (Advanced Silicon Modular Block) column based architecture, the Virtex-6 family contains multiple distinct sub-families. Each sub-family contains a different ratio of features to most efficiently address the needs of a wide variety of advanced logic designs. In addition to the high-performance logic fabric, Virtex-6 FPGAs contain many built-in system-level blocks. These features allow logic designers to build the highest levels of performance and functionality into their FPGA-based systems. Virtex-6 FPGAs offer the best solution for addressing the needs of high-performance logic designers, high-performance DSP designers, and high-performance embedded systems designers with unprecedented logic, DSP, connectivity, and soft microprocessor capabilities.

Interoperability Description and Customer Benefit:
As a supplier of FPGAs used in DSP and video applications, Xilinx is committed to providing industry-leading DSP development tools, methodologies, IP and support through its Targeted Design Platforms. The Xilinx Targeted Design Platform for DSP brings these elements together into productized solutions that accelerate development for experienced users and simplifies the adoption of FPGAs for new users. See http://www.xilinx.com/products/technology/dsp/index.htm for more information. Xilinx collaboration with Synopsys for the Synplify DSP flow gives customers a high quality design flow coupled with industry leading FPGAs.

For ASIC prototyping, the Virtex®-6 FPGA family is the high-performance silicon foundation for Targeted Design Platforms. Consuming 50% lower power and delivering 20% lower cost than the previous generation, the new family is built with the right mix of programmability, integrated blocks for DSP, memory, and connectivity support - including high-speed transceiver capabilities - to satisfy the insatiable demand for higher bandwidth and higher performance. Matched with the Synopsys FPGA-based prototyping products, our high end FPGAs provide an optimal solution for getting your next generation ASIC to market faster.

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Flow Diagram

Flow  Diagram


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