System Level Catalyst Program 

Docea Power 

Docea Power Logo Docea's Aceplorer is an ESL platform for capturing power models and exploring low power/temperature architectures. The System-Level Catalyst program enables our joint customers to generate power-dimensioning scenarios from architecture performance models running in Synopsys Platform Architect and from software running on Synopsys Virtual Prototypes. The scenarios are then used for system-level power analysis in Aceplorer, for exploring trade-offs between performance and power consumption and definition of the optimum architecture configuration.

- Ghislain Kaiser, CEO of Docea Power


Product Description
Docea Power provides with Aceplorer the first electronic system level (ESL) solution for the modeling, exploration and optimization of power and thermal behavior of any electronic systems architecture. The solution answers the needs of system architects in charge of power optimization of on-chip (SoCs, SiPs, FPGAs, ASICs) or on-board (embedded systems) designs. Aceplorer allows the modeling of heterogeneous systems, with any mix of digital, analog or mixed signal blocks, and with different levels of model complexity. The result is a larger exploration of the design space for the best low power implementation strategy, which can take into account the embedded software impact on the design's power consumption.

Aceplorer is used for:
  • Architecture and low power strategies exploration, use case profiling
  • System dimensioning
  • Power aware embedded software development
  • Power-driven hardware and software partitioning
  • Early power and thermal distribution estimation for temperature sensitive designs
  • Early Analysis of risks (e.g. power budget, peak temperature, IR drops, thermal runaways)
  • Decision making support for process technology, packaging or cooling system selection
  • Export and support of power intent format, UPF

Interoperability Description and Customer Benefit
The integration with Aceplorer enables designers to link the performance analysis results from Platform Architect with the power consumption analysis results provided by Aceplorer. The architecture captured in Platform Architect is exported in Aceplorer to generate a relevant power model. The performance analysis results containing power state switching and activity also generated in Platform Architect are used as use case scenarios in Aceplorer to run the power consumption simulation. Power intent from the design is captured in Unified Power Format (UPF).

The integration with Synopsys Virtual Prototypes enables software developers to assess software impact on power consumption and heat dissipation and optimize accordingly. Embedded software behavior can be generated from a simulation and power analysis and optimization is generated in Aceplorer.

Customer benefit:
The combined solution offers new capabilities for customers:
  • Explore and optimize both power and performance at the architecture level
  • Refine power/thermal estimation at the system level
  • Assess software impact on power consumption or heat dissipation
  • Develop, simulate and validate complex power/thermal management policies before silicon is available

Tell me more about Docea and Platform Architect and Virtual Prototypes .

Flow Diagram

Flow  Diagram