Addressing static or leakage-based power consumption requires new techniques and standards that fall outside the scope of traditional HDL-based flows. The IEEE Standard 1801-2009, based on Accellera’s Unified Power Format (UPF), allows designers to describe low power design intent and improve the way complex integrated circuits can be designed, verified and implemented. This world-wide open standard for low power from IEEE permits all EDA tool providers to implement advanced tool features that enable the design of low-power ICs. Starting at the Register Transfer Level (RTL) and progressing into the detailed levels of implementation and verification, UPF facilitates an interoperable, multi-vendor tool flow and ensures consistency throughout the design process.
- Advantages of UPF:
- The UPF file is the input to several tools (e.g., simulation, synthesis, formal verification, and place-and-route tools).
- Synthesis tools can read the RTL/UPF design input files and produce a netlist.
- The UPF file may be reused without change later in the tool flow.
- A UPF specification can be included with the other deliverables of intellectual-property (IP) blocks and reused along with the other delivered IP files.
- The same standard can be used in a multi-vendor tool flow
Synopsys support for UPF
As one of the leaders in the development and ratification of the UPF standard, Synopsys provides several tools and solutions based on the IEEE 1801-2009 UPF standard, most prominently the Low Power Solution.
Detailed information about IEEE 1801-2009 can be found here.
EDA companies and their customers had gone on individual quests to address the need for a low-power design and verification flow until the Unified Power Format (UPF) standard initiative was introduced. In July 2006, the industry became critically aware of the need for a common standard to describe low-power design intent throughout a multi-vendor design flow. Texas Instruments, Nokia, Magma Design Automation, Mentor Graphics, and Synopsys showed leadership in helping to coalesce many electronic design automation (EDA) suppliers and end-user companies around the UPF standard. With their backing, UPF has become the fastest EDA standard produced by Accellera to date with the highest number of technology donations converged into a single, open standard. In February 2007, Accellera delivered UPF to the IEEE Standards Association for formal ratification as IEEE Std. P1801™.
Subsequently, LSI Corp (formerly LSI Logic), Infineon and Nordic Semiconductor along with the original participants under Accellera efforts enhanced the low power specification for broader use and adoption by the user and EDA vendor community. In March 2009, this specification was formally approved by IEEE as the IEEE 1801-2009 standard.