SystemC 

Enabling system-to-silicon design and verification 

SystemC™ is a high-level design language written in standard C++ and built by extending it with class libraries. It is also known as the IEEE Standard 1666™-2005. SystemC addresses the need for a language that spans hardware and software design and verification. The language is particularly applicable for modeling systems’ partitioning, creating fast virtual platforms for pre-silicon embedded software development and software driven verification, evaluating and verifying the assignment of blocks to either hardware or software implementations, and architecting and measuring the interactions between and among functional blocks. Leading companies in the intellectual property (IP), electronic design automation (EDA), semiconductor, electronic systems, and embedded software industries currently use SystemC. They deploy it to develop virtual platforms for hardware/software co-design, software driven verification and for architectural exploration.

Enabling SystemC model interoperability and reuse at the transaction-level is the OSCI Transaction-level Modeling Standard, TLM-2.0.

Synopsys support for SystemC
Synopsys has been a co-founder of the Open SystemC Initiative (OSCI) in 1999 and has been a corporate member ever since. SystemC is supported by Synopsys’ solutions, platforms, tools, and libraries forverification, pre-silicon software development and architectural exploration.