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Recent Stories

Accelerating Multi-Die Innovation: How Synopsys and Samsung are Shaping Chip Design
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4 min read / Mar 03, 2026

Accelerating Multi-Die Innovation: How Synopsys and Samsung are Shaping Chip Design

Amlendu Shekhar Choubey
By Amlendu Shekhar Choubey
Tags: Multi-Die, AI & Machine Learning, 3DIC Design, About Synopsys, Physical Implementation, Interface IP, Signoff, Engineering Central, Silicon Lifecycle Management, Signal & Power Integrity, Design, Manufacturing, Design Technology Co-Optimization, Silicon IP
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AI Sovereignty: Balancing National Priorities with Global Realities
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3 min read / Feb 24, 2026

AI Sovereignty: Balancing National Priorities with Global Realities

Dustin Todd
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Tags: Executive Voices, AI & Machine Learning, About Synopsys
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ETH Zurich and Technical University of Munich Advance European Chip Innovation
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5 min read / Feb 18, 2026

ETH Zurich and Technical University of Munich Advance European Chip Innovation

Catherine Le Lan
By Catherine Le Lan
Tags: Customer Spotlight, AI & Machine Learning, RISC-V, Design, About Synopsys, Physical Implementation, Interface IP, Energy-Efficient SoCs, HPC, Data Center, Silicon IP, Verification
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LPDDR6 vs. LPDDR5 and LPDDR5X: What’s the Difference?
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4 min read / Feb 10, 2026

LPDDR6 vs. LPDDR5 and LPDDR5X: What’s the Difference?

Scott Knowlton
By Scott Knowlton
Tags: Memory, Design, About Synopsys, Interface IP, Verification IP, Silicon IP, Verification
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Generative and Agentic AI in Chip Design Explained
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4 min read / Feb 04, 2026

Generative and Agentic AI in Chip Design Explained

Raja Tabet
By Raja Tabet
Tags: Executive Voices, AI & Machine Learning, Design, About Synopsys
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Engineering for the Exponential Complexity of Physical AI
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4 min read / Jan 28, 2026

Engineering for the Exponential Complexity of Physical AI

Greg Sorber
By Greg Sorber
Tags: Executive Voices, AI & Machine Learning, Design, About Synopsys, Automotive, Consumer, Verification
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From Concept to Tape-Out: SiMa.ai Achieves Bug-Free A0 Silicon for Physical AI
Blog
5 min read / Jan 22, 2026

From Concept to Tape-Out: SiMa.ai Achieves Bug-Free A0 Silicon for Physical AI

Greg Sorber
By Greg Sorber
Tags: RTL Synthesis, AI & Machine Learning, Physical Verification, Prototyping, Emulation, About Synopsys, Physical Implementation, Interface IP, Energy-Efficient SoCs, Signoff, Customer Spotlight, Signal & Power Integrity, Design, Fusion Design Platform, HPC, Data Center, Processor Solutions, Silicon IP, Verification, Formal Verification
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