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Issue 2, 2011
The Standards Column: DAC Meeting Highlights Standards Progress

Synopsys Insight reports on the constantly evolving world of semiconductor standards and interoperability.

As part of its Design Automation Conference (DAC) program this year, Synopsys hosted its annual “Interoperability Breakfast”, which brought together many partners and customers to discuss the world of standards and interoperability. The industry has achieved much, but recognizes that there will always be more to do.

Synopsys’ chief operating officer, Dr. Chi-Foon Chan, began proceedings by reviewing some of the key standards that the industry has progressed over the past decade or so, since open source standards were first established.

In 1999, Synopsys made its .lib format for library modeling available. This evolved into Liberty, the industry’s first open source standard in the electronic design automation (EDA) industry. Since then, Synopsys has made a series of open source formats available for the benefit of design teams. As technology keeps advancing, new opportunities for standards continue to arise. Last year, Synopsys announced the open source availability of its Interconnect Technology Format (ITF), made available through the Synopsys TAP-in™ program.

ITF is a very well established, mature format, and technology files written in this language exist for a large number of process nodes that designers are using today – from 130-nm to 20-nm and beyond. It is the underlying format used by Synopsys’ StarRC™ parasitic extraction and IC Compiler physical implementation tools. As an open source standard, ITF enables designers and foundries to support and qualify extraction technology files based on the same format. Further, all EDA vendors’ tools will be able to support the format, providing increased efficiency and improved interoperability.

Figure 1: Interconnect Modeling Technical Advisory Board (IMTAB) founder members
Figure 1: Interconnect Modeling Technical Advisory Board (IMTAB) founding members

It is one thing to open a format; it is quite another to enhance it in an open forum. Last year, Synopsys, alongside other industry leaders, launched a technical advisory board under IEEE-ISTO, called IMTAB, to drive ITF and evolve it into the desired interoperable format for advanced process technologies. IMTAB comprises 11 founding members from major foundries, semiconductor and EDA companies. The group’s charter is to meet at least twice a year to consider the enhancement proposals, debate the pros and cons, and vote on proposals to extend the format.

Two of the founding members of the IMTAB – Andy Brotman, vice president of Design Infrastructure for GLOBALFOUNDRIES, and Rich Laubhan, a distinguished engineer and manager of Design Integrity at LSI Corporation – shared their experiences and insights on the new open source ITF standard with the Interoperability Breakfast audience.

The Tenzing Norgay Interoperability Achievement Award
This year, Synopsys presented the Tenzing Norgay Interoperability Achievement Award to Shrenik Mehta for his work at Accellera, a leading standards organization in EDA. Please see our DAC Review article for more information.

IPL at a Crossroads
In 1997, a few EDA companies got together and started the Interoperable PDK Libraries (IPL) alliance. Physical Design Kit (PDK) interoperability offers many benefits. It enables custom design innovation, improves design team productivity, reduces PDK development and maintenance costs, and eases analog IP migration.

Foundries such as TSMC, TowerJazz and LFoundry joined the IPL alliance, and since then, IPL has attracted more members from leading semiconductor companies such as ST Micro, Altera, Xilinx and Dongbu HiTek.

IPL 1.0, the semiconductor industry’s first standard for an interoperable PDK (iPDK), is gaining acceptance with more foundries and IDMs developing iPDKs for their customers. Today, four out of five top pure-play foundries have or are building iPDKs. The standard received further support at DAC with the announcement of IPL Constraint 1.0, the semiconductor industry’s first standard for interoperable analog design constraints. The constraint specification is available immediately to IPL members.

The IPL Alliance continues to gain momentum and is actively encouraging support and participation from new foundry partners. Maximizing support for the IPL will help the entire ecosystem to get more from the standards it is producing – for everyone’s benefit.

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