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Issue 3, 2012

Special Announcement:
Connect with Experts at

Synopsys has introduced a new resource for SoC verification engineers and users of verification IP (VIP). Neill Mullinger, Verification IP product marketing manager, Synopsys, explains why is set to become the “go-to” resource for protocol-based verification.

VIP Central is an industry-wide, technical community site for system-on-chip (SoC) verification engineers and users of verification IP. It provides a centralized online resource of relevant forums and blogs focusing on the verification of today’s industry-standard protocols.

VIP Central
VIP experts relay the importance of to the community.
Watch the welcome video at

The new online resource includes the latest technical information and discussions on the use of verification IP and advanced methodologies to verify protocol-based IP. Site topics include IP integration, SoC sub-systems, and full SoCs. brings together information from industry experts across the verification community, providing best practices and ideas for better verification performance, protocol debug, verification planning and coverage management. Contributors will also highlight key aspects of methodology and ease-of-use.

Sharing Best Practices
According to Rich Wawrzyniak, senior market analyst for ASIC and SoC at Semico Research, SoC companies must grow their design teams to deal effectively with new releases of IP protocols. “As each new SoC adds the next generations of different IP blocks, IP subsystems and frequent releases of new protocols, SoC companies are required to quickly ramp their verification teams to embrace these changes. The launch of as a technical resource for protocol-based verification will improve ramp times, act as a repository of knowledge and expertise for designers, and also enable the verification IP experts in the industry to share their best practices with the verification community.”

Expert Blogs and Forums
Recent blog posts provide in-depth advice on a number of hot topics, including:
  • How to create a stimulus generation infrastructure that can cover the complete verification space for an ARM® AMBA® 4 ACE™ interconnect-based system
  • An in-depth look at the link training sequence for USB 3.0
  • The first of a four-part article on how to create a strategy to verify an ARM® AMBA® 4 AXI™ ACE-compliant interconnect

Regular contributors share their experience in architecting and implementing testbenches, verification IP and transaction-level modeling.

Protocol-centric forums are facilitating discussions between experts and members on topics related to the day-to-day questions and challenges facing verification engineers.

I hope that you find this resource helpful in making your day-to-day activities more productive and enjoyable.

Visit online at

About the Author
Neill Mullinger is a Verification IP Product Marketing Manager at Synopsys. Neill joined Synopsys in 2000 and has been focused on verification IP and protocol verification since 2002. He brings more than 25 years of experience in the hardware and EDA industries as an applications engineer and product manager.

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