DesignWare Technical Bulletin  

DesignWare® Interface IP Goes Virtual 

Overview
Are you working on a multicore, multimedia, multifunction or multiprocessor design? Then you are most likely working on a design with multiple interfaces. With the average number of interfaces on complex chips rising from just one or two to many, many design teams are looking for ways to get an early view on how those interfaces affect hardware/software integration and SoC validation.

The Synopsys DesignWare® TLM Library provides product development teams a comprehensive set of standards-based, tool-independent, transaction-level models (TLMs) of DesignWare IP that serve as the building blocks of virtual prototypes. Virtual prototypes are fully functional software models of complete embedded systems, enabling pre-RTL embedded software development and software-driven system validation. The ability to co-design hardware and software through virtual prototypes significantly reduces the product design cycle and speeds time-to-market. The TLM-2.0 LT (loosely timed) models also benefit from advanced debug and analysis capabilities when used with Synopsys’ Virtualizer and Platform Architect MCO tools. The TLM-2.0 AT (approximately timed) model of the DesignWare Memory Controller for AMBA and the cycle accurate DesignWare AXI Fabric model are optimized for Synopsys’ architecture design solution. The architecture design solution enables the efficient design, performance analysis and optimization of multicore SoC architectures to avoid over-design, under-design, cost increases, schedule delays and re-spins.

Mirroring the productivity gains realized by IP reuse in the implementation phase, the DesignWare TLM Library accelerates the development of virtual prototypes by providing pre-defined abstract models of hardware components in wireless, multimedia, networking and automotive application domains.

What does the DesignWare TLM Library include?
The library includes fast transaction-level models of Synopsys’ leading interface IP. For example, the library has models for SuperSpeed USB 3.0, USB 2.0, USB 2.0 OTG, SATA, Ethernet, PCIe® cores and AMBA® interface components. All of the models are SystemC™ TLM-2.0 standard-based with application program interface (API) for easy integration, tool-independence and model interoperability and reuse. These models are validated against the actual software drivers and provide enhanced visibility into core internals. They are register accurate for software binary compatibility.

How are these models used?
Because virtual prototyping enables early availability of a system representation pre-silicon, easier accessibility and deployment to global development teams, and increased productivity with high visibility and control over entire systems, this methodology is gaining in adoption by not only large semiconductor and electronic systems companies, but also smaller IP houses and others. However, to implement virtual prototypes, development teams require a comprehensive set of transaction-level models (TLMs) that serve as the building blocks. High quality models give virtual prototype developers a jump start in efficiency.

For more information about the DesignWare TLM Library or other virtual prototyping tools and models, please contact us.



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