The Synopsys Generic Memory Compiler is available for Synopsys University Program members to use when custom tailoring memory circuits for specific design needs. The Generic Memory Compiler contains software for the automatic generation of static memory circuits (SRAMs) based on parameters set by the user. It has the ability to generate a range of SRAMs with different output data formats for integrating memory into a design. The Generic Memory Compiler supports both the Synopsys 32/28nm and 90nm Generic Libraries. It is designed for educational and training purposes only and not recommended for fabrication.
Generic Memory Compiler Basics
- Software for memory circuit/layout generation
- Outputs multiple design views
- Optimized for use with Synopsys' Digital Design Flow
- Requires Synopsys University EULA
Generic Memory Compiler Overview
- 2 different user interfaces are supported:
- 4 types of memories are supported:
- Dual port SRAMs
- Single port SRAMs
- Low power dual port SRAMs (32/28nm only)
- Low power single port SRAMs (32/28nm only)
- GDSII layout
- SPICE netlist
- Schematic and layout views
- Verilog model
- VHDL model
- LEF/FRAM views
- Parasitic extraction
- Physical verification
The Generic Memory Compiler is available in Members Only for Synopsys University Program members to download. You must have a valid SolvNet ID and password to access. To request support for the Generic Memory Compiler, contact us.
"Using the Synopsys Generic Memory Compiler in our complex processor for DSP application was a great time-saving tool. It helped the students generate the SRAM they wanted in a snap, saving them critical time to concentrate on the rest of the complex design."
— Dr. Maged Ghoneima, Assistant Professor of Electrical Engineering, American University in Cairo