Conference at a Glance 

SNUG Singapore 2012 | August 17, 2012 

Olivia Ballroom, Level 4,
Raffles City Convention Centre,
Fairmont Hotel

  Time

 Description

8:00am-8:50am
Registration (Olivia Ballroom)
8:50am-9:00am
WELCOME — SNUG Singapore Introduction
9:00am-9:45am
Keynote Address:
Mr Henry Law, Vice President, Design Enablement, GLOBALFOUNDRIES
9:45am-9:55am
SNUG Technical Committee Introduction
9:55am-10:15am
Tea Break (Stamford foyer)
 
Design Implementation
(Olivia Ballroom)
Digital Systems & AMS Verification (VIP Lounge B)
Tutorial & Breakout Session (Orchard Room)
10:15am-10:45am
User Paper 1: Design Compiler Graphical in FPGA Designs
Altera Corp
User Paper 1: Circuit Check enhancements to reduce false violations for Low Power Design
Infineon Technologies
Tutorial: Techniques for High Performance Cores using Synopsys Galaxy Platform-ARM® Cortex-A15 Case Study
10:45am-11:15am
User Paper 2: Managing Test Power Consumption on complex SoC
ST-Ericsson
User Paper 2: Implementing External Features into a Processor Designer-Generated Processor
BiTMICRO Networks
11:15am-11:45am
User Paper 3: Building Highly Efficient Hierarchically Tiled Designs in ICC
Altera Corp
User Paper 3: Enable Advance Custom Designer Usage Model with P-Cells Creator and SDL Translation
eSilicon
TCAD Tutorial: TCAD Sentaurus G-2012.06 Release and Advanced CMOS Applications
11:45am-12:15pmUser Paper 4: Leakage Power Optimization Techniques in High-Speed Design
MediaTek
User Paper 4: Improving System Gate-Level Simulation using VCS new features
BiTMICRO Networks
12:15pm-1:15pm
Lunch (Sophia Room)
1:15pm-2:15pm
A Silicon Interposer-Based 2.5D-IC Design Flow - Going 3D by Evolution Rather Than by Revolution
(Olivia Ballroom )
Mr Don Chan, Vice President, Research & Development, Synopsys Inc.
2:15pm-2:45pm
User Paper 5: Automated Interface Timing Constraints Adjustment for Design Convergence
Intel Corp
User Paper 5: Architecting UVM based Verification Environments
STMicroelectronics
FPGA Tutorial: Effective Strategies for Bringing Up and Debugging an FPGA-based Prototype
2:45pm-3:15pm
Tutorial: Faster PrimeTime Signoff - Tips, Tricks, and New Technology
Tutorial: Identify Low-Power Circuit Design Issues with CustomSim-Circuit-Check
3:15pm-3:35pm
Tea Break (Stamford foyer)
3:35pm-3:45pm
Guess the Best SpeakerGuess the Best SpeakerGuess the Best Speaker
3:45pm-4:45pm
Power Today, Tomorrow and Day After
Mr Godwin Maben,
Applications Consultant, Scientist,
Synopsys Inc.
Tutorial: Designing Programmable Hardware Accelerators: Gaining Flexibility Without Compromising Power, Area and PerformanceTutorial: Library Characterization for IPs and Memories using SiliconSmart
4:45pm-5:15pm
Best Paper Awards & Lucky Draw! (Olivia Ballroom)