SNUG search results 


Cell-Aware Test - Austin, 2015
TutorialVideo

A Solution for Enabling SHS-Based Functional Testing of Fuse Macro in SMS - Austin, 2015
Umesh Chandra Parasar, Mudit Srivastava, Suresh Gubba - STMicroelectronics
Publish Only

A Vendor-Independent Formal Unreachability Analysis Flow for Automated Coverage Closure - Austin, 2015
Xiushan Feng - NVIDIA; Abhishek Muchandikar, Sunil Keerthi, Praveen Tiwari - Synopsys
PaperPresentationSession Recording

Accelerate Simulation, Analysis, and Debugging of Complex IC Designs Using Synopsys AMS Tools - Austin, 2015
TutorialVideo

Achieving Optimal Quality of Results Faster with Design Compiler - Austin, 2015
Tutorial

ARM Cortex-A53 Multi-Core Network Computing Reference Implementation on Samsung 14LPP FinFET Process - Austin, 2015
TutorialVideo

Auto LBIST - Austin, 2015
TutorialVideo

Complete Low Power Verification Using Formality - Austin, 2015
TutorialVideo

DFTMAX and TetraMAX 2015.06 Updates - Austin, 2015
TutorialVideo

Finding Incorrect Parameter Settings Early in the Development Phase Using Certitude - Austin, 2015
Varun Ramesh, Amol Bhinge - Freescale Semiconductor; Jay Dutt - Synopsys
PaperPresentationSession Recording

Getting Productive in the IC Compiler II GUI - Austin, 2015
TutorialVideo

Global Event Handling with UVM Custom Phasing - Austin, 2015
Jeremy Ridgeway, Dolly Mehta - Avago Technologies
PaperPresentation

High-Performance, Energy-Efficient Implementation of the ARM Cortex-A72 Processor - Austin, 2015
TutorialVideo

High-Performance, Energy-Efficient Implementation of the ARM Cortex-A72 Processor Using Synopsys Design Compiler Graphical RTL Synthesis Solution - Austin, 2015
TutorialVideo

Increase Your Layout Productivity for FinFET and Advanced Nodes Using Synopsys Custom Implementation Tools - Austin, 2015
TutorialVideo

Integration of Custom PCIe Application with Synopsys VIP - Austin, 2015
Siddharth Krishna Kumar, Brent Vestal - Seagate Technology
Publish Only

Introduction to SpyGlass DFT ADV & Demo - Austin, 2015
TutorialVideo

- Austin, 2015
Prashant Aggarwal - OSKI; Anders Nordstrom- Synopsys

Is Your Testing N-wise or Unwise? Pairwise and N-wise Patterns in SystemVerilog for Efficient Test Configuration and Stimulus - Austin, 2015
Kevin Johnston, Jonathan Bromley - Verilab
PaperPresentationSession Recording

Latest Advancements for Handling Local Variation Effects in Timing Analysis - Austin, 2015
TutorialVideo

Low Power Static Checking - A Deeper Look at Debugging - Austin, 2015
TutorialVideo

Mastering Reactive Slaves in UVM - Austin, 2015
Jeff Montesano, Mark Litterick - Verilab; Taruna Reddy - Independent
PaperPresentation

Mixed-Signal SoC Designs Using VCS AMS Performance and Capabilities - Austin, 2015
TutorialVideo