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A Hybrid IC Compiler II-Based Flow for Rapid Design Closure - Silicon Valley, 2015
PaperPresentation

A Method to Dynamically Disable/Enable SystemVerilog Assertions - Silicon Valley, 2015
Thinh Ngo - Broadcom
PaperPresentation

Accelerating Analog IP Characterization & Verification by FlexIP Using Custom Design, HSPICE, and Custom WaveView - Silicon Valley, 2015
Murilo Pilon Pessatti - Chipus
Presentation

Accelerating Library Characterization Through Infrastructure Optimization - Silicon Valley, 2015
Bikash Roy Choudhury - NetApp; Ragini Suram - Synopsys
Presentation

Achieving High Compression Ratios with Cell-Constrained Designs Using DFTMAX Ultra - Silicon Valley, 2015
Kalyana Kantipudi - Altera; Anand Gangwar - Synopsys
PaperPresentationSession Recording

Achieving Highest Accuracy FinFET Extraction with StarRC "QuickCap Inside" Solution - Silicon Valley, 2015
Tom Mahatdejkul - ARM
Presentation

Achieving Optimal Quality of Results Faster with Design Compiler - Silicon Valley, 2015
Tutorial

Achieving Significant Productivity Improvement with StarRC Simultaneous Multi-Corner Solution - APM Experience - Silicon Valley, 2015
Subbayyan Venkatesan - APM
Presentation

An Apparatus for Quantifying and Replaying Consolidated EDA Workload - Silicon Valley, 2015
Jignesh Bhadaliya - EMC
Presentation

An Optimal Approach for Datapath Implementation and Verification Methodology - Silicon Valley, 2015
VSRP Kumar, Poonam Rani - Imagination Technologies
PaperPresentation

Area-centric Reference Implementation Flow for ARM Mali Cost-Efficient GPUs - Silicon Valley, 2015
Pierre-Alexandre Bou-Ach - ARM
PaperPresentationSession Recording

ASIC to FPGA-based Prototype Conversion - Silicon Valley, 2015
Tutorial

ATOM Mobile SoC Performance and Power Architecture Exploration - Silicon Valley, 2015
Presentation

Best Practices for Boosting Timing Performance Results in Your FPGA - Silicon Valley, 2015
TutorialVideo

Best Practices in Software Testing using Coverity Tools - Silicon Valley, 2015
TutorialVideo

Build and Integrate Your Own Custom IO Interfaces for Your HAPS-Based SOC Prototype - Silicon Valley, 2015
Manohar Chandrasekhar - NVIDIA
Presentation

Challenges and Benefits of Deploying a Master UPF Flow - Silicon Valley, 2015
Chetan Avlani, Anand Lakshmanan, Ling Zhang - Broadcom; Amir Nilipour, Krishna Theja Avvaru, Vishwajith Singh - Synopsys
PaperPresentation

Challenges and Solutions for 14nm Design Flows - Silicon Valley, 2015
Tamer Ragheb – GLOBALFOUNDRIES; Jichun Zhou - Synopsys
Presentation

Compile-time Parameter Distribution for Highly Reusable Testbenches - Silicon Valley, 2015
Mark Glasser, Aman Arora - NVIDIA
PaperPresentationSession Recording

Compression Chain Diagnosis - Silicon Valley, 2015
Saravanan Gajendran - Cisco Systems; Anand Gangwar - Synopsys
PaperPresentationSession Recording