Conference at a Glance 

SNUG Boston 2012 | September 6, 2012 
Boston Marriott Newton Hotel
2345 Commonwealth Ave.
Newton, MA 02466

 Time

 Description

8:30-9:30
Registration and Breakfast
9:30-10:30
Welcome and Keynote
10:30-10:45
Break
 

Verification

Implementation Flow

Synthesis &
Physical Design

Test

Custom Verification &
Signoff    

FPGA

10:45-12:15

TA1 User and Tutorial Session:
Verification - Debug Productivity

TA2 User Session:
Methodology Solutions with Synopsys Physical Design Tools

TA3 User & Tutorial Session:
Synthesis

TA4 User & Tutorial Session:
Test

TA5 User & Tutorial Session:
AMS Verification

TA6 Tutorial Session:
FPGA - Co-Simulating with a Prototype System, Solving P&R Challenges on High-Density FPGAs

12:15-1:15
Lunch
1:15-3:15

TB1 User & Tutorial Session:
Verification - UVM

TB2 Tutorial & Vision Session:
Solving Design Challenges at 28nm and Below

TB3 User Session:
Top-Level Design Closure Using the Galaxy Platform

TB4 Tutorial Session:
Test

TB5 Tutorial Session:
Custom Signoff

TB6 Tutorial Session:
FPGA - Synopsys Design Constraints in FPGA Space, High Reliability Techniques in Premier

3:15-3:30
Break
3:30-5:00

TC1 User & Tutorial Session:
Verification - Complex Designs

TC2 Tutorial Session:
Physical Design

TC3 User Session:
Physical Design - Advanced Clock Techniques in IC Compiler

TC4 Tutorial Session:
PrimeTime and Constraints

TC5 Tutorial & User Session:
AMS Formal Verification

TC6 Tutorial Session:
Flow Automation and Programmable Design - Lynx & Processor Designer

4:45-7:00
Designer Community Expo & Awards Presentation