TSMC Awards 

 
Synopsys Selected as TSMC's 2015 Interface IP Partner of the Year for Sixth Consecutive Year
2016 Interface IP Partner of the Year Award given to Synopsys during TSMC's OIP Forum

Synopsys Selected as TSMC's 2016 "Interface IP Partner of the Year" for Sixth Consecutive Year

Synopsys was presented with TSMC's 2016 "Interface IP Partner of the Year" award at the TSMC Open Innovation Platform (OIP) forum held on September 22 at the San Jose Convention Center. Synopsys has been honored with this award every year since its inception in 2010. The award selection criteria includes customer feedback, TSMC9000 compliance, number of customer tape-outs and technical support excellence. Synopsys’ portfolio of silicon-proven DesignWare® Interface IP including USB, PCI Express®, DDR, MIPI®, HDMI, SATA, Ethernet is now available for TSMC’s  10-nm and 16-nm FinFET processes with 7-nm IP in development.

   
TSMC Awards Synopsys Partner of the Year 2016
Synopsys receives TSMC's 2016 Partner of the Year Award for Joint Development of 7-nm Mobile Design Platform

TSMC Awards Synopsys "Partner of the Year 2016" for Joint Development of 7-nm Mobile Design Platform

On September 22, during TSMC's Open Innovation Platform forum, TSMC awarded Synopsys "Partner of the Year 2016" for joint development of the 7n-nm Mobile Design Platform. Synopsys' digital and custom design tools are broadly certified for 7-nanometer mobile designs, including reference flows. Certified tools include: IC Compiler™ II for routing and placement, IC Validator DRC, LVS and metal fill, StarRC™ 7-nm multi-patterning and 3-D FinFET modeling, PrimeTime® signoff-accurate timing analysis, PrimeRail accurate static and dynamic IR-drop analysis, NanoTime static timing analysis of 7-nm embedded SRAMs, Galaxy Custom Compiler®, HSPICE®, CustomSim™ and FineSim® simulation products for 7-nm FinFET device modeling and accurate circuit simulation results for analog, logic and SRAM designs.

   
TSMC Awards Synopsys Partner of the Year 2016 for Joint Development of 7-nm Mobile Design Platform
Synopsys receives TSMC's 2016 Partner of the Year Award for Joint Development of 7-nm HPC Design Platform

TSMC Awards Synopsys "Partner of the Year 2016" for Joint Development of 7-nm HPC Design Platform

On September 22, during TSMC's Open Innovation Platform forum, TSMC awarded Synopsys "Partner of the Year 2016" for joint development of the 7-nm HPC Design Platform. Synopsys' digital and custom design tools are broadly certified for 7-nanometer HPC designs, including reference flows. Certified tools include: IC Compiler™ II for routing and placement, IC Validator DRC, LVS and metal fill, StarRC™ 7-nm multi-patterning and 3-D FinFET modeling, PrimeTime® signoff-accurate timing analysis, PrimeRail accurate static and dynamic IR-drop analysis, NanoTime static timing analysis of 7-nm embedded SRAMs, Galaxy Custom Compiler®, HSPICE®, CustomSim™ and FineSim® simulation products for 7-nm FinFET device modeling and accurate circuit simulation results for analog, logic and SRAM designs.