Tuesday, October 16, 2012
08:00 am – 6:00 pm
San Jose Convention Center
150 San Carlos Street
San Jose, CA 9511
Visit Synopsys in the Ecosystem Pavilion:
Synopsys and TSMC have been collaborating for over a decade to provide customers with technology-leading solutions.
At our booth, you’ll see the latest developments in 20nm implementation, DesignWare IP tuned for TSMC’s advanced processes and 3DIC to take you to the next level of design.
Our application consultants will also be on hand to answer your questions. While you’re there, enter our drawing for a chance to win an iPad3!
Three Synopsys Sessions at the OIP Forum:
1. Advanced Silicon Design Methodology For Achieving 20nm Ready Physical IP (view abstract)
Speaker: Navraj Nandra, Synopsys
2. TMI: A unified compact model development platform for 28nm and beyond (view abstract)
Speaker: Joddy Wang, Synopsys
3. Double-patterning aware modeling and extraction for 20nm IC design (view abstract)
Speaker: Bari Biswas, Synopsys
For more information and to register, visit the TSMC OIP Forum Website.