System-Level Catalyst Member 

Vector Fabrics 
Vector Fabrics Logo Designing a next-generation multicore SOC and optimizing the required software for it, is a complex task, one that can only be completed efficiently with the use of state-of-the-art software and hardware tools. We are pleased to work together with Synopsys to integrate our easy-to-use and unique parallelization tools under the System-Level Catalyst program and bring a combined solution to our joint customers.

- Mike Beunder, CEO of Vector Fabrics

Product Description
Making software work on modern complex multicore platforms can be an incredibly complicated task. vfEmbedded makes programming such a multicore SOC easy. The intuitive user interface lets you optimize your software for your target platform without changing a single line of code. Evaluate performance, memory bandwidth, and cache behavior for different parallelization strategies. Partition your code for multicore ARM or Intel processors. Perform hardware/software co-design of your next generation SOC or FPGA implementation in hours, not weeks.
  • Analyze: dynamic and static program analysis presents easy to understand visualizations, program hot-spots and coverage, thorough dependency analysis, data flow, and I/O behavior such as cache hits/misses, bandwidth numbers for code sections, etc.
  • Explore: Explore parallelization strategies using point and click to add threads, assign tasks to processors, and add processors and accelerators to your hardware architecture, automatically adjusting performance estimations.
  • Implement: Presents detailed recipes, adds concurrency using the vfTasks library, results in bug-free correct-by-construction code.
  • Run: resulting parallel system is guaranteed to meet the performance requirements; program execution is correct and ready to be deployed.
Established in 2007, Vector Fabrics specializes in developing tools for the design and implementation of multicore, multi-threaded applications and embedded systems.

Interoperability Description and Customer Benefit

vfEmbedded's integration with Synphony C Compiler (SCC) FPGA high-level synthesis flow.
vfEmbedded's partitioning and mapping engine acts as a front-end to Synopsys' Synphony C Compiler (SCC) high-level synthesis flow. vfEmbedded statically and dynamically analyzes software and guides the user through a process of selecting and partitioning code, making it suitable for implementation in hardware accelerators using SCC. The SCC FPGA implementation flow includes Synplify Premier for FPGA logic synthesis implementation.

vfEmbedded's integration with Platform Architect
Vector Fabrics' vfEmbedded follows a software-centric top-down approach toward SOC design. vfEmbedded performs thorough static and dynamic analysis of your software, and guides you through the process of splitting it up, and mapping it across multiple processors or accelerators. Detailed data such as data bandwidth between threads, processor load, etc. can be used to augment and adjust the characteristics of performance models in Platform Architect for further analysis and optimization of multicore hardware-software partitioning.

Tell me more about Vector Fabrics, Platform Architect and Synphony C Compiler.

Flow Diagram

vfEmbedded - Platform Architect


vfEmbedded – Synphony C Compiler